Many semiconductor devices, especially those operating at high frequency, experience high electric fields and electric field gradients during operation. Controlling the electric field distribution within the active area(s) (i.e., the area(s) of the device that contribute to its operation) of such a semiconductor device is an important factor in device design and optimization.
Field control elements are often used to control the electric field distribution of a semiconductor device. Examples of field control elements include, for example, field plates, guard rings, trenches and grooves, etc. However, all of these elements have fixed conductivity and dielectric properties.
The design of field control elements is not limited only to its specific geometry (see, for example, A. Koudymov, V. Adivarahan, J. Yang, G. Simin, A. Khan, “Mechanism of current collapse removal in field-plated nitride HFETs”, IEEE Electron Device Letters, 26 (10), pp. 704-706, Oct. 2005). Many issues limiting the semiconductor device performance, such as current collapse in GaN based HFETs, can be eliminated by providing a leakage path through such an element. The leakage current must be precisely controlled during device fabrication. For example, the reliable operation of a “flash memory” element is based on such precise, predictable control. However, in practice, it is extremely hard to control the leakage currents through the dielectric layers.
High power/voltage semiconductor devices are also sensitive to surface design, since performance is often limited by edge effects or surface termination design. Typical technological solutions for controlling the surface properties of a semiconductor device include, for example, various dielectric layers or elements and metal plates or structures designed for the redistribution of electric field at both the device surface and active area. Limitations of such approaches are basically the same as the limitations of using metals and dielectrics for non-linear circuit elements; being electrically linear media, both metals and dielectrics only allow electric field modifications that scale with external electric potential, and therefore limit the device design to a narrow range of optimal biases, which in turn does not allow for proper design optimization for large signal applications.